- Lead pre-layout and post-layout simulation flow with a focus on high-speed interface and PDN, create simulation models and develop simulation methodology for SIPI design
- Lead SIPI validation methodology and develop detailed engineering test plans
- Validate high speed interface and PDN impedance in lab to correlate simulation results and improve design flow
- Use simulation and lab data to support design troubleshooting and propose corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems
- Support multiple projects at the same time
- Bachelor’s degree in Electrical Engineering, Physics, Mathematics, or related field (or equivalent experience)
- 5+ years of experience with signal integrity analysis, simulation, and measurement
- 5+ years of experience in SIPI fundamentals, familiar with PCB and flex design and manufacture process
- Proven understanding of impedance control, transmission line and PDN characterization, feasibility study and create practical design guidelines
- Hands-on experience using 2D/2.5D/3D simulation tools, creation of complex SIPI models, frequency, and time domain simulation
- Hands-on experience using high speed lab equipment and PHY compliance test fixtures
- 7+ years of experience in SIPI simulation and validation areas
- Experience with high-speed interface protocols such as MIPI, PCIe, and USB.
- Experience using Cadence Sigrity, PowerSI, Ansys SIwave, Keysight ADS, 3D layout and Ansys HFSS
- Experience with consumer hardware design, review and bring-up process, CAD tools, constraint manager etc.
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